A semiconductor device is capable of realizing diverse operation by a number of electric devices integrated in a single substrate. For this purpose, various high-technical fabrication methods have been used, and each device in semiconductor device fabrication has been developed in miniaturized form as a component in smaller dimensions.
Semiconductor systems of high-integration and high-capacity have been proposed by developing the technology of packaging semiconductor devices. The semiconductor packaging technology has been changed from a wire bonding to a flip-chip bumping capable of realizing a chip scale, to meet the market requirements.
FIG. 1 is a sectional view illustrating an example of a structure of a conventional ball grid array (BGA) package 10. An individual semiconductor chip 14 is bonded to one side of a substrate 12 for a package by a bonding layer 20, and a part of the semiconductor chip is electrically connected to a part of the substrate by a wire 16. A number of solder bumps 18 are formed on the bottom surface of the substrate, and a protecting molding 30 to cover the semiconductor chip and the wire is formed on the top surface of the substrate.
As described above, in the conventional art, a substrate with a predetermined thickness is needed for the package of the semiconductor chip. When the semiconductor chip operates, signals are transferred through the electrical interconnection from the wire formed on the top surface of the substrate to the solder bumps formed on the bottom surface of the substrate. However, as a semiconductor device has been developed, the operation speed of the semiconductor device has been remarkably improved. Then, when an interconnection length within a package is long, a signal is delayed or a distortion is serious upon high-speed operation or high-capacity signal process, thereby failing to satisfy the requirements for various application devices.
Moreover, since the substrate of a predetermined thickness is needed for a package, there are limits in reducing the size and thickness of the whole package. Consequently, the substrate becomes an obstacle in developing communication devices or electronic devices to be small or slim.
Moreover, the conventional BGA package technology has a limit in realizing diverse stacked packages or systemized packages and is not effective in mass production.
Therefore, the present invention is directed to provide a new BGA package which is very thin in thickness and simple in structure.
Another object of the present invention is to provide a BGA package which has a short electrical interconnection length, to be favorable for high speed operation.
Another object of the present invention is to provide a BGA package which is easily stacked and mounted on the surface.
Another object of the present invention is to provide a method of fabricating a BGA package, which is favorable in mass production, has a simple process and significantly reduces a fault rate.
The other objects and characteristics of the present invention will be presented in more detail below:
In accordance with an aspect of the present invention, the present invention provides a semiconductor package comprising: a multilayer thin film structure including a plurality of dielectric layers and at least one or more redistribution layers; a semiconductor chip positioned at one side of the multilayer thin film structure and electrically connected to the redistribution layer; and solder bumps formed the other side of the multilayer thin film structure.
The semiconductor chip may include at least one or more redistribution layers or may be bonded to the multilayer thin film structure without any redistribution layers. The semiconductor chip may be electrically connected to the multilayer thin film structure by the bumps or wire, or two or more semiconductor chips to be stacked may be positioned at one side of the multilayer thin film structure. When a plurality of the semiconductor chips are positioned at the multilayer thin film structure, one semiconductor chip may be electrically connected to the multilayer thin film structure by the bumps and the other semiconductor chip may be electrically connected to the multiple thin film structure by the wire.
The semiconductor package further includes a molding part formed at one side of the multilayer thin film structure in a lateral direction of the semiconductor chip. The molding part may be formed to be lower than the top surface of the semiconductor chip, to minimize the entire thickness of the semiconductor package.
The multilayer thin film structure may be used as a substrate of the semiconductor package, to realize a flip chip package. Since a plurality of the packages can be simultaneously formed at wafer level or carrier level, a process is simple and is favorable in mass production.
The multilayer thin film structure may perform an additional function because a thin film passive device is embedded inside. The thin film passive device may include at least one of, for example, a capacitor, an inductor and a resistor.
Between the redistribution layer of the multilayer thin film structure and the solder bumps, at least one metal layer may be formed, and the metal layer may include an electrode pad and an under bump metal.
The semiconductor package according to the present invention can be realized as an extremely light, thin, short and small package. Furthermore, a plurality of these semiconductor packages can be very easily stacked. Specifically, a stacked semiconductor package can be provided by electrically connecting and vertically positioning two or more semiconductor packages, each package comprising a multilayer thin film structure including a plurality of dielectric layers and at least one or more redistribution layers; a semiconductor chip positioned at one side of the multilayer thin film structure and electrically connected to the redistribution layer; and solder bumps formed the other side of the multilayer thin film structure, by the solder bumps. In this case, one BGA package may be electrically connected to one side of the multilayer thin film structure of the other BGA package through the solder bump. Further, a systemized package can be realized by vertically stacking the BGA packages or horizontally mounting the BGA packages on a separate printed circuit board.
The light, thin, short and small stacked package according to the present invention enables communication devices, displays and the other various electronic devices to be small and slim and is contributed to the increase of competitiveness of the products to which the package is applied.
In accordance with another aspect of the present invention, the present invention provides a method of fabricating a semiconductor package, comprising steps of: forming a multilayer thin film structure including a plurality of dielectric layers and at least one or more redistribution layers; arranging a semiconductor chip at one side of the multilayer thin film structure and electrically connecting the semiconductor chip to the redistribution layer; and forming solder bumps at the other side of the multilayer thin film structure.
Preferably, the multilayer thin film structure may be formed at wafer level or carrier level. After the multilayer thin film structure is electrically connected to the semiconductor chip and the solder bumps are formed, the multilayer thin film structure may be separated into individual packages, to simplify the whole process.
After the semiconductor chip is formed at wafer level, only the semiconductor chip having an excellent operation characteristic, which is selected through a semiconductor chip test at wafer level, is bonded to the multilayer thin film structure, to provide a high quality package product by maximally reducing a fault rate of the semiconductor chip.
Further, the package is fabricated by using an ultra thin film structure of a micrometer level, without any substrate for a package, to make the package thickness to be smallest and by partially forming a molding part to complement a mechanical support force of the multilayer thin film structure. Furthermore, the method of fabricating the semiconductor package further comprise a step of thinning the back surface of a wafer after forming the semiconductor chip at wafer level, to realize an extremely thinned BGA package.
The multilayer thin film structure forms a bonding layer on a wafer or carrier and forms an under bump metal, an electrode pad, a dielectric layer and a redistribution layer on the bonding layer. After the semiconductor chip is electrically connected to the multilayer thin film structure, the wafer or carrier is removed from the multilayer thin film structure.
In accordance with the present invention, a plurality of the packages in which the multilayer thin film structure and the semiconductor chip are connected to each other are simultaneously fabricated at wafer level or carrier level and thereafter are separated into individual packages. Therefore, the semiconductor package according to the present invention is favorable in mass production and reduces the fabrication cost.